Power supply with nonlinear foldback current limiter circuit

ABSTRACT

A power supply has transistors arranged to pass current from a power source to a load having a variable resistance so that current drawn by the load is variable. The circuit includes a comparator amplifier which compares a reference voltage with output voltage and actuates a bias control transistor for reducing conductance of the transistors when an overload occurs. A nonlinear current foldback means is connected in circuit with the bias control transistor to introduce a non-linear characteristic in the control of bias of the transistors.

United States Patent [1 1 11 3,801,894 Spiegel Apr. 2, 1974 [54] POWERSUPPLY WITH NONLINEAR 3,345,554 10/1967 Lupoli 323 4 FOLDBACK CURRENTLIMITER CIRCUIT 3,473,106 10/1969 Grab 3,675,114 7/1972 Nercessian 323/9[75] Inventor: Robert M. Spiegel, Pelham, NY.

.. P E -G ald Goldb r [73] Assignee: Trygon Electronics, Inc., Westbury,nmary mmmer er e g NY. [22] Filed: Sept. 15, 1972 [57] ABSTRACT [52] US.Cl....., 323/9, 317/3, 317/33 VR, 323/17, 323/20, 323/22 T [51] Int. Cl.Gf 1/56 [58] Field of Search 323/4, 9, 17, 20, 22 T; 317/31, 33 VR [56]References Cited UNITED STATES PATENTS 3,072,841 H1963 Saunders 323/22 T3,072,842 H1963 Vaughn 323/2 2 T 3,005,147 /1961 Thomas 323/9 [2 1s 26POWER 24 SOURCE VIN;

3a 39 72 7o v Appl. No.: 289,261

A power supply has transistors arranged to pass current from a powersource to a load having a variable resistance so that current drawn bythe load is variable. The circuit includes a comparator amplifier whichcompares a reference voltage with output voltage and actuates a biascontrol transistor for reducing conductance of the transistors when anoverload occurs. A nonlinear current foldback means is connected incircuit with the bias control transistor to introduce a non-linearcharacteristic in the control of bias of the transistors.

4 Claims, 2 Drawing Figures V V 'r LOAD I x: A 45 O CIRCUIT ZENERDIODECOMPAP ATOR AMPLIFIER REFERENCE V VOLTAGE INVERTING NON IN MERT7N6 0INPUT INPUT PATENTEUAPR 2 I974 JIII'IIIIIL m& K

wOmzOw mmtsOa POWER SUPPLY WITH NONLINEAR FOLDBACK CURRENT LIMITERCIRCUIT This invention relates to the art of transistorized currentlimiter circuits and more particularly concerns a limiter circuit havingmeans for producing nonlinear foldback of the. controlled and limitedcurrent.

It is well known in the art to provide a transistorized current limitercircuit connected between a power supply and a resistance load to limitthe load current in the event that the load exceeds a preset value. Suchlimitation is necessary to protect components of both the load circuitand the current limiter circuit against ex cessive heating and damagedue to excessive load current. It is also known to provide a currentlimiter circuit with means for linear foldback of the load current sothat the current passed by the limiter and thevoltage applied to theload both drop in a linear relationship. It has been found that suchconventional limiter circuits with linear foldback means do notsufficiently protect delicate, heat sensitive, semiconductor componentsof the limiter circuit because overvoltages are applied to the limitercircuit even though the load current, under foldback conditions, isbeing reduced from normal magnitudes to minimum ones.

It is therefore a principal purpose of the invention to overcome theabove and other difficulties and disadvantages of prior transistorizedlimiter circuits, by providing a limiter circuit with nonlinear foldbackcontrol. More precisely stated, the foldback is controlled at two rates.First the load current is decreased rapidly while the voltage applied tothe limiter circuit is being reduced less rapidly until a criticalvoltage current point is reached, whereupon the applied voltage isreduced more rapidly while the load current is reduced less rapidlyuntil minir'numresidual voltage and current magnitudes are reached.These desirable results are obtained by providing the limiter circuitwith a comparator amplifierresponsive to the magnitude of load currentto drive pass transistors in the limiter circuit and by providingnonlinear resistance means responsive to a samplingof load current toactivate a current limiting transistor which reduces the driving currentof the pass transistors in the event of current overload. The net effectis to cause foldback of load current at two different successive linearrates, so that the limiter circuit is protected under all currentconditions against overheating and consequent damage.

Accordingly, a primary object of the present invention is to provide atransistorized limiter circuit with nonlinear foldback control.

Another object of the present invention is to provide a'limiter circuitwith the foldback controlled at at least two different rates.

These and other objects and many of the attendant advantages of thisinvention will be readily appreciated as the same becomes beterunderstood by reference to the following detailed description whenconsidered in connection with'the accompanying drawings in which:

FIG. 1 is a diagram of a limiter circuit embodying the invention; and

FIG. 2 is a graphic diagram used in explaining the invention.

A power supply shown has a pair of input terminals 12, 14 to which adirect input voltage Vin is applied from a suitable power source 16.This can be a power supply converting AC to DC or any other suitablepower source. The terminal 12 is a positive voltage terminal and theterminal 14 is a negative voltage terminal. The voltage is reduced inmagnitude or stepped down by a plurality of current pass transistors 18connected in parallel. Each of the collectors 20 of the transistors 18is connected to a common line 22 to which the positive terminal 12 isconnected. Each of the emitters 24 of the transistors 18 is connected inseries with an individual resistor 26 which is connected to a commonline 28 connected to the positive voltage output line terminating at acircuit output terminal 30. A negative voltage output terminal 32 isconnected via a negative load line 33 to the input terminal 14. Anysuitable resistance load or load circuit 34 which draws a load current Iat an 06556? voltage V i 51F E c o rinected across the output terminals30, 32. It will be understood that the load circuit 34 is subject tovariable intemal resistance conditions and it is therefore necessary toprovide means for safely limiting the current drawn by the load circuitto avoid damaging the current passing transistors 18 as well as the loadcircuit 34 itself. The means for doing this will now be described.

Each of the bases 36 of the transistors 18 is connected to a junctionpoint 38 on a line 40. Connected in series to junction points 38 is aresistor 42 and a resistor 44. Connected to the resistor 44 is a zenerdiode 48 which in turn is connected to the negative load line 33. Aresistor 49 is connected across the zener diode 48fThe smart revengevra'ciass'rfiaras'iaamaaa the voltage V,, across the resistors 44 andthe zener diode 48, equals a voltage V, which is opposed by a voltageV,, which isthe output voltage developed across the load circuit 34 atthe terminals 30 and 32. The current passing through the resistor 26 isproportional to the load current I and thus constitutes in effect asampling of the load current at all times.

A voltage source 50 provides a constant reference voltage which isapplied to one input 62 of a conventional comparator amplifier 68.Another input 64 of the amplifier 68 is connected to the terminals 30and 32 to sample the output voltage V,,. An output 69 of the comparatoramplifier 68 is connected in circuit to a pair of transistors 52 and 70which amplifies the output 69 and controls the bias applied to the passtransistors 18 and thus controls their conductance. A collector 71 fromtransistor 70 is connected to the line 22. An emitter 72 from thetransistor 70 is connected to the line 40 via a resistor 74. A base 75is connected via a resistor 76 to the line 40. By this arrangement, thecurrent pass transistors 18 are enabled to conduct at full rated currentwhen the comparator amplifier 68 drives the transistor 52 and 70 toprovide proper enabling bias to the transistors 18.

The operation of circuit '10 will be now explained with particularreference to both FIGS. 1 and 2. Referring first to FIG. 2, the loadcurrent I is plotted against output load voltage V,,. A sloping line Llrepresents normal decrease in voltage applied to the circuit 10 underconditions of increasing load current. At a critical maximum loadcurrent 1 the output voltage will be V The-voltage across the passtransistors 18 and the resistor 26 will be V, i.e. V,,+V =V Suppose nowan overload occurs in the output load circuit 34. The circuit 10 willrespond by a foldback in the load current I which will drop rapidly asindicated by the slope of line L2 from point Plwhile the voltage V0 loadcurrent I,"

transistors 18 is only one half or less of the voltage V Thus the passtransistors 18 are effectively protected 3 applied to the load -willdrop more slowly, and the voltage V, applied to the pass transistors 18will rise slowly. The voltage V, will be measured on the graph by thedistance between the line L2 and the input voltage line Ll. At point P2,a'critical voltage is reached where the current-passing throughthe passtransistors 18 is reduced to asafe level. The load voltage willthen dropmore rapidly as'indicated by the steep slope of the foldback line L3,whereas the load eurrentdrops more slowly until point P3 is reachedwhere a minimum residual load current l,,- is maintained. This residualcurrent'condition is maintained to keep transistors 18 activated andawaiting restoration of full load conditions upon normalization of theload. It will be noted that the current foldback is nonlinear, that is,it is done in two linear stages'at different rates. I

This mode of operation of the invention may now be contrasted with thatillustrated by the dotted line L4 which represents linear foldback ofload currentas obtained with-a conventional current limiter providedwith linear foldback means. It will be noted that the load current andload voltage drop uniformly in linear relationship with each othertopoint P3 where residual voltage and current are obtained. However atsome intermediate load current I, the voltage V,,. applied to the passtransistors is excessive ie the power dissapation I X V is likely toburn them out or considerably shorten the useful life thereof. Bycontrast, at this the voltage V across the pass during this intermediaterange of load currents between full load currently and the minimum loadcurrent I The manner in which the components of the circuit operate toproduce this desirable two-stage or non linear foldback of load currentwill now be described. A current limiting transistor 60 is normallynonconducting. When it is rendered conducting it denies turn on bias tothe passtransistor 18 so that the transistor 60 serves as a'protectivecircuit device.

Power supplies such as the source 16 are required to operate at specificoutput levels and are improved by provision of current foldback featureswhen load current exceeds a predetermined limit. if the load becomessuch that full load current will tend to be exceeded, the load currentis limited, and if the load increases, the load current will be reducedi.e. folded back. As the voltage applied to the load circuit is reduced,the load current will also be reduced. The pass transistors 18experience heat dissipation equal tothe voltage across them multipliedby the current flowing through them. When the load overvoltage becomesso large as to institute current limiting so as toreduce the outputvoltage, .the voltage across the pass transistors 18 may become greaterthan in normal service. Foldback then becomes necessary. Thatis, byreducing current flow the degree to which the transistors can dissipatepower is limited.

The voltage across thepass transistors 18 is the difference betweenthesource input voltage V and the voltage across the load V,,. If thevoltage across the load drops from point P1 in FIG. 2, a correspondingincrease in voltage across and current through the pass transistors mustbe avoided to'prevent excessive power dissipation in and overheating ofthe pass transistors 18. The nonlinear diode 48 and resistor 49 areintroduced into the foldback determining circuit to effect thetransistors 18. An emitter 56 of the transistor 60 is connectedv to thepositive voltage output terminal30 via a resistor 57. The voltage V isnormally not sufficient to turn on the transistor 60, however when thevoltage V exceeds the voltage V, (developed through the resistor 42'),by the'base emitter voltage of the transistor 60, the transistor 60 willturn on. Thus, the turnon of the transistor 60 is controlled by thepre-setresistance of the resistor 42. If an overload condition occurs inthe load circuit 34, the voltage V,, increases to a point-(as describedabove) where the transistor 60 is rendered conductive. When thetransistor 60 is conductive, the collector 66 of the transistor 60approaches the-potential of the terminal 30 thereby denying the biasvoltage from the pass transistors 18. n

The nonlinear zenerdiode 48 hasalow resistance when the voltage acrossit is high, so that this diode is normally in avalanching conditionunder full load conditions. The resistance of the diode 48 become highwhen the applied voltage is lower and avalanching ceases. Thus when theoutput'voltage V is high, the slope of line L2 is dominated by the lowresistance of the diode 48, and when the voltage V falls below somecritical value at point P2 when avalanching no longer takesplace, thediode resistance becomes high and exceeds the low resistance of resistor49 which then becomes more effective. The load, voltage then fallsrapidly as indicated by the steep slope of line L3. The load currentfalls also but at a lower rate than during the first stage of foldbackindicated by line Ll.

It will now be clear why and how the circuit operates to effect foldbackin two stages. The entire foldback process is linear in the sense thatit is done intwo stages as a result of control effected by operation ofthe zener diode which is a nonlinear resistance element. The passtransistors conduct at all times but under such bias control that theycannot pass excessive damaging current regardless of the external loadcircuit voltage, current and resistance.

It should be understood that the foregoing relates to only a preferredembodiment of the invention and that it is intended to cover all changesand modifications of the example of the invention herein chosen for thepurposes of the disclosure, which do not constitute departures from thespirit and scope of the invention.

In the claims:

1. "A current limiter circuit comprising:

input terminals for receiving current from a power source; outputterminals for passing current to a load;

' current transmissions components in circuit with said input and outputterminals for passing said current to said load; i

a current limiting means connected in circuit with said currenttransmission components for limiting current passing through saidcomponents to predetermined safe magnitudes; and

nonlinear current foldback means connected in circuit with said currenttransmission components,

said nonlinear foldback means comprising a Zener diode whose resistanceis low due to avalanching when the applied voltage is high and whoseresistance is high due to cessation of avalanching when the appliedvoltage is low, so that said nonlinear current foldback means initiallyreduces the current through said current transmission components rapidlywhile reducing the voltage applied thereto slowly, and when currentpassing through said current transmission components has been reduced toa safe mangitude, the voltage applied thereto is reduced rapidly whilethe current passing thereto is reduced slowly.

2. A current limiter circuit as defined in claim 1, wherein said currenttransmission components are pass transistors, and said circuit furthercomprises a bias control means arranged in circuit with said transistorsfor varying the current conductance thereof, said bias control meansbeing further connected in circuit with said current limiting means, sothat the conductance of said transistors is controlled by said currentlimiting means when said load exceeds a preset value.

3. A current limiter circuit as defined in claim 2, wherein said biascontrol means comprises:

a comparator amplifier having two inputs and an output;

a first circuit means connecting one amplifier input to said outputterminals;

a reference voltage source connected in circuit with the other input tosaid amplifier; and

circuit means connecting said output of said amplifier to saidtransistors and to said current limiting means, whereby said comparatoramplifier produces a bias voltage to control the conductance of saidtransistors and said current limiting means denies the passage of saidbias voltage to said transistors when said load exceeds a preset value.

4. A current limiter circuit as defined in claim 1, wherein said currentlimiting means comprises a normally non-conducting current limitingother transistor connected in circuit with said bias control means,whereby said current limiting transistor is rendered conductive whensaid load exceeds a preset value.

1. A current limiter circuit comprising: input terminals for receivingcurrent from a power source; output terminals for passing current to aload; current transmissions components in circuit with said input andoutput terminals for passing said current to said load; a currentlimiting means connected in circuit with said current transmissioncomponents for limiting current passing through said components topredetermined safe magnitudes; and nonlinear current foldback meansconnected in circuit with said current transmission components, saidnonlinear foldback means comprising a Zener diode whose resistance islow due to avalanching when the applied voltage is high and whoseresistance is high due to cessation of avalanching when the appliedvoltage is low, so that said nonlinear current foldback means initiallyreduces the current through said current transmission components rapidlywhile reducing the voltage applied thereto slowly, and when currentpassing through said current transmission components has been reduced toa safe mangitude, the voltage applied thereto is reduced rapidly whilethe currenT passing thereto is reduced slowly.
 2. A current limitercircuit as defined in claim 1, wherein said current transmissioncomponents are pass transistors, and said circuit further comprises abias control means arranged in circuit with said transistors for varyingthe current conductance thereof, said bias control means being furtherconnected in circuit with said current limiting means, so that theconductance of said transistors is controlled by said current limitingmeans when said load exceeds a preset value.
 3. A current limitercircuit as defined in claim 2, wherein said bias control meanscomprises: a comparator amplifier having two inputs and an output; afirst circuit means connecting one amplifier input to said outputterminals; a reference voltage source connected in circuit with theother input to said amplifier; and circuit means connecting said outputof said amplifier to said transistors and to said current limitingmeans, whereby said comparator amplifier produces a bias voltage tocontrol the conductance of said transistors and said current limitingmeans denies the passage of said bias voltage to said transistors whensaid load exceeds a preset value.
 4. A current limiter circuit asdefined in claim 1, wherein said current limiting means comprises anormally non-conducting current limiting other transistor connected incircuit with said bias control means, whereby said current limitingtransistor is rendered conductive when said load exceeds a preset value.